Welcome to IC Design Services Verilog-A[Verilog-AMS] Modeling Home Page

The Verilog-AMS Hardware Description Language defines behavioral descriptions for analog/mixed signal systems and was derived from the IEEE 1364 Verilog HDL standard. The original specification, called Verilog-A, was supported by main stream circuit simulators such as Spectre, Hspice, Eldo, and Smartspice. Verilog-A models are now considered a sub-set of the Verilog-AMS standard(see Verilog-A Wiki page for more information). IC Design Services's behavioral models conform the the Verilog-A OVI 2.2 standard as defined by Tiburon Design Automation. Tiburon supplies a Verilog-A compiler module to many of the major Spice simulation vendors. Models conforming to Tiburon standards are compact and execute with a minimum of convergence issues. Below is a sample of Verilog-A models developed by IC Design Services;

    Top Down Design System Models
             Power Switch Module
             Controller Module
  • Behavioral Models for Analog Functions
  • Logic Block Models with Correct Input/Output Characteristics, Fault Detection
    Electromechanical Models
    Physical Circuit Emulation Models
  • Switch Capacitor Signal Processing Models
  • Switching Regulator Functional Blocks
    Analog Simulation Test Benches
  • Bandgap Trim Evaluator(Statistical Design Environment)
  • Automatic Specification Parameter Extraction
  • Switching Regulator Performance Data Extractors

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